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 P R E L I M I N A RY I N F O R M AT I O N
ICS544-01
Clock Divider
Description
The ICS544-01 is crystal oscillator module IC with divide by 512 frequency output. It employs a 16.777216 MHz fundamental frequency crystal source oscillator to generate 32.768 kHz output crystal oscillator output. In addition a divide by 256, 64 and 32 options also provided through select pins. The chip has an OE pin that tri-states the output and stops the oscillator circuits. The ICS544-01 is a member of ICS' ClockBlocksTM family of clock building blocks. See the ICS541 and ICS542 for other clock dividers, and the ICS501, 502, 511, 512, and 525 for clock multipliers.
Features
* * * * * * * * * * *
Packaged in 8-pin SOIC or die Available in Pb-free package ICS' lowest cost clock divider Easy to use with other generators and buffers Input clock frequency up to 156 MHz Output clock duty cycle of 45/55 Output Enable Advanced, low-power CMOS process Operating voltage of 2.25 V to 3.6 V Does not degrade phase noise - no PLL Available in industrial temperature range
Block Diagram
VDD
S1, S0 (1:0) Divider and Selection Circuitry
/32, /64 /256, /512,
X1/ICLK 16.777216 MHz clock or crystal X2 input Optional tuning capacitors
CLK1
GND
OE
MDS 544M-01 A
1
Revision 041505
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
P R E L I M I N A RY I N F O R M AT I O N
ICS544-01 Clock Divider
Pin Assignment
X1/ICLK X2 GND S0 1 2 3 4 8 7 6 5 S1 VDD OE CLK
Clock Divider Table
S1
0 0 1 1
S0
0 1 0 1
CLK
Input/32 Input/64 Input/256 Input/512
8-pin (150 mil) SOIC
0 = connect directly to ground 1 = connect directly to VDD
Pin Descriptions
Pin Number
1 2 3 4 5 6 7 8
Pin Name
X1/ICLK X2 GND S0 CLK OE VDD S1
Pin Type
XI Xo Power Input Output Input Power Input Crystal or Clock input.
Pin Description
Connect to crystal for crystal input and leave open for clock input. Connect to ground. Select 0 for output clock. Connect to GND or VDD, per divider table above. Internal pull-up resistor. Clock output per table above. Output Enable.Tri-states output clock when low. Also shuts down the oscillator circuit. Internal pull-up resistor. OE=1 normal operation. Connect to 2.25 V to 3.6 V. Select 1 for output clock. Connect to GND or VDD, per divider table above. Internal pull-up resistor.
External Components
Series Termination Resistor
Clock output traces over one inch should use series termination. To series terminate a 50 trace (a commonly used trace impedance), place a 33 resistor in series with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 20. On chip capacitors- Crystal capacitors should be connected from pins X1 to ground and X2 to ground to optimize the initial accuracy. The value (in pf) of these crystal caps equal (CL-12)*2 in this equation, CL=crystal load capacitance in pf. For example, for a crystal with a 16 pF load cap, each external crystal cap would be 8 pF. [(16-12)x2]=8.
Decoupling Capacitor
As with any high-performance mixed-signal IC, the ICS544-01 must be isolated from system power supply noise to perform optimally. A decoupling capacitor of 0.01F must be connected between VDD and the PCB ground plane.
PCB Layout Recommendations
For optimum device performance and lowest output phase noise, the following guidelines should be observed. 1) The 0.01F decoupling capacitor should be mounted on the component side of the board as close to the
MDS 544M-01 A
2
Revision 041505
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
P R E L I M I N A RY I N F O R M AT I O N
ICS544-01 Clock Divider
VDD pin as possible. No vias should be used between decoupling capacitor and VDD pin. The PCB trace to VDD pin should be kept as short as possible, as should the PCB trace to the ground via. Distance of the ferrite bead and bulk decoupling from the device is less critical. 2) To minimize EMI, the 33 series termination resistor (if needed) should be placed close to the clock output.
3) An optimum layout is one with all components on the same side of the board, minimizing vias through other signal layers (the ferrite bead and bulk decoupling capacitor can be mounted on the back). Other signal traces should be routed away from the ICS544-01. This includes signal traces just underneath the device, or on layers adjacent to the ground plane layer used by the device.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS544-01. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range.
Item
Supply Voltage, VDD All Inputs and Outputs Ambient Operating Temperature Storage Temperature Junction Temperature Soldering Temperature 7V
Rating
-0.5 V to VDD+0.5 V 0 to +70C -65 to +150C 125C 260C
Recommended Operation Conditions
Parameter
Ambient Operating Temperature Power Supply Voltage (measured in respect to GND)
Min.
-40 2.25
Typ.
Max.
+85 3.6
Units
C V
MDS 544M-01 A
3
Revision 041505
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
P R E L I M I N A RY I N F O R M AT I O N
ICS544-01 Clock Divider
DC Electrical Characteristics
Unless stated otherwise, VDD = 2.25 V to 3.6 V, CL=15 pf5%, Ambient Temperature -40C to +70C
Parameter
Operating Voltage Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Operating Supply Current Operating Supply Current Standby Current Short Circuit Current Input Capacitance Nominal Output Impedance Internal Pull-up Resistor
Symbol
VDD VIH VIL VOH VOL IDD IDD ISB IOS CIN ZO Rpup
Conditions
S0, S1, OE, ICLK S0, S1, OE, ICLK IOH = -2 mA IOL = 2 mA VDD =2.25 V - 2.75 V VDD= 2.75 V - 3.6 V OE=0
Min.
2.25 0.7VDD
Typ.
Max.
3.6 0.3VDD
Units
V V V V V mA mA ua mA pF k
VDD-0.4
VDD-0.15 0.15 0.3 0.5 40 0.4 0.6 1 10 4 20 TBD
S0, S1, OE at VDD/2
AC Electrical Characteristics
Unless stated otherwise, VDD = 2.25 V to 3.6 V5%, CL=15 pf5%, Ambient Temperature -40C to +70C
Parameter
Input Frequency, clock input Output Rise Time Output Fall Time Duty Cycle Output Enable Delay Time Output Disable Delay Time
Symbol
tOR tOF tOE tOD
Conditions
VDD = 3.3 V 0.1VDD to 0.9VDD 0.9VDD to 0.1VDD at VDD/2 OE going high to CLK output valid OE going low to CLK output invalid
Min.
0
Typ.
0.2 0.2
Max.
156 1 1 55 2 2
Units
MHz us us % us us
45
49 to 51
Thermal Characteristics
Parameter
Thermal Resistance Junction to Ambient
Symbol
JA JA JA JC
Conditions
Still air 1 m/s air flow 3 m/s air flow
Min.
Typ.
150 140 120 40
Max. Units
C/W C/W C/W C/W
Thermal Resistance Junction to Case
MDS 544M-01 A
4
Revision 041505
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
P R E L I M I N A RY I N F O R M AT I O N
ICS544-01 Clock Divider
Marking Diagram (ICS554M-01)
8 5
Marking Diagram (ICS554M-01LF)
8 5
554M-01 ###### YYWW
1 4
1
554M01LF ###### YYWW
4
Marking Diagram (ICS554MI-01)
8 5
Marking Diagram (ICS554MI-01LF)
8 5
554MI-01 ###### YYWW
1 4 1
554MI01L ###### YYWW
4
Notes: 1. ###### is the lot number. 2. YYWW is the last two digits of the year and week that the part was assembled. 3. "LF" denotes Pb (lead) free package. 4. "I" denotes industrial temperature range. 5. Bottom Marking: (origin) Origin = country of origin if not USA.
MDS 544M-01 A
5
Revision 041505
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
P R E L I M I N A RY I N F O R M AT I O N
ICS544-01 Clock Divider
Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Body)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
8
Inches Min Max
Symbol
Min
Max
A A1
E INDEX AREA H
1.35 0.10 0.33 0.19 4.80 3.80 5.80 0.25 0.40 0
h x 45
1.75 0.25 0.51 0.25 5.00 4.00 6.20 0.50 1.27 8
.0532 .0040 .013 .0075 .1890 .1497 .2284 .010 .016 0
.0688 .0098 .020 .0098 .1968 .1574 .2440 .020 .050 8
B C D E e H
12 D
1.27 BASIC
0.050 BASIC
h L
A A1
C
-Ce
B SEATING PLANE L
.10 (.004)
C
MDS 544M-01 A
6
Revision 041505
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
P R E L I M I N A RY I N F O R M AT I O N
ICS544-01
Clock Divider
Ordering Information
Part / Order Number
ICS544M-01 ICS544M-01T ICS544MI-01 ICS544MI-01T ICS544M-01LF ICS544M-01LFT ICS544MI-01LF ICS544MI-01LFT ICS554-01DWF ICS554-01DPK
Marking
544M-01 544M-01 544MI-01 544MI-01 544M01LF 544M01LF 544MI01L 544MI01L
Shipping Packaging
Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Die on uncut, probed wafers Tested die in waffle pack
Package
8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC
Temperature
0 to +70 C 0 to +70 C -40 to +85 C -40 to +85 C 0 to +70 C 0 to +70 C -40 to +85 C -40 to +85 C 0 to +70 C 0 to +70 C
Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments.
MDS 544M-01 A
7
Revision 041505
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com


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